QBM - Mapping User-Specified Functions to Programmable Logic through a QBF Satisfiability Problem

Programmable logic devices enable users to exploit the tremendous concurrency benefits of hardware in their compute solutions without requiring them to go through a silicon production process. The most powerful among these devices are fieldprogrammable gate arrays (FPGAs) that provides hundreds of thousands of logic slices, each one of the capable of computing any arbitrary boolean 6-input function [1]. The configuration of these devices is computed in a synthesis process, which translates a behavioral or functional specification into a structural netlist consisting of the configurable primitives found on the devices and their configurations. These configurations include, for instance, truth tables to be stored in lookup table (LUT) components as well as datapath configurations that establish the proper signal connections.